Signal Integrity In Practice

This class empowers attendees to achieve Signal Integrity, in Practice. Combining classroom instruction, hands-on labs, software, and ‘back-at-your-desk’ office hours, the class ensures successful application of SI skills. Attendees are now using this proven multi-dimensional approach on their current projects (for example, PCIe Gen5/6 systems).

Focusing on Gen2 SI while building upon Gen1 givens, attendees learn the skills necessary to solve SI both NOW and in the decades ahead. Day 1 covers delivering signals cleanly through the (passive) PCB system before Day 2 adds the (active) IC capabilities. Active SerDes equalization (EQ) radically changes how SI is achieved and practiced, and this class shows you how.

Though higher data rates do require updated design practices, "doubling data rate isn't something to be afraid of, it's simply what we do," says your instructor, Donald Telian, who has doubled data rate more than a dozen times throughout his 40-year career. Telian simplifies the challenge by sharing what’s necessary, and what isn’t. Register now to attend a class near you. We'll see you there!

Info: Today’s systems must deliver signals through passive interconnect with 10 mV accuracy, requiring loss and discontinuities to be carefully understood and managed. Day 1 explains how to correctly combine PCBs, connectors, cables, vias, traces, packages etc., to ensure a meaningful signal arrives at the Rx. Hands on labs ensure an intuitive understanding of passive impedances and loss. Attendees finish Day 1 with a sense of "I can do this," regardless of
how mysterious and complex SI seemed at the start of the day. For detailed agenda please visit www.siguys.com/training

Info: Integrity of signals cannot be achieved without factoring in the ICs, particularly integrated equalization (EQ). Because EQ is the number one reason links both work and fail, Day 2’s hands-on labs quickly boot up attendees on how to configure it effectively. Day 2 also takes a deeper look at topics such as crosstalk, stackups, and DDRx, with a practical focus on what automation
(e.g., design tools, measurements, link training) will handle and what it will not.
Day 2 rounds out the class with cutting-edge, unique, and engaging topics.

Host or Publisher Donald Telian