Hands-on Introduction to CHERI and CHERIoT

Schedule

Wed Mar 25 2026 at 09:30 am to 05:30 pm

UTC+00:00

Location

Computer Laboratory | Cambridge, EN

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A comprehensive tutorial on CHERI alongside the CHERI Blossoms 2026 conference.
About this Event

The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC have co-organised a comprehensive tutorial on CHERI alongside the CHERI Blossoms 2026 conference.

The aim of this tutorial is to introduce attendees, in particular students, researchers and developers from academia and industry, to CHERI and CHERIoT, memory safety and compartmentalization aspects of them, and hardware-software stacks involving CheriBSD, CHERI Linux and CHERIoT RTOS. The material presented on the day will include presentations, CHERI and CHERIoT code examples and practical exercises that the participants will be given time to work on with assistance from the organisers.

The agenda of the tutorial is:

  • 9:30 - 10:30 : Part I - Introduction to CHERI, memory safety and compartmentalization (1h)
  • 10:30 - 10:45 : Break (15 min)
  • 10:45 - 11:45 : Part I - CHERI software experimentation on CheriBSD/Morello (1h)
  • 11:45 - 12:45 : Lunch (1h)
  • 12:45 - 13:45 : Part II - CHERI-RISC-V, Codasip X730 and CHERI Linux (1h)
  • 13:45 - 14:00 : Break (15 min)
  • 14:00 - 15:00 : Part II - CHERI-RISC-V, Codasip X730 and CHERI Linux (1h)
  • 15:00 - 15:15 : Break (15 min)
  • 15:15 - 16:15 : Part III - CHERIoT, lowRISC’s Sonata FPGA and CHERIoT RTOS (1h)
  • 16:15 - 16:30 : Break (15 min)
  • 16:30 - 17:30 : Part III - CHERIoT, lowRISC’s Sonata FPGA and CHERIoT RTOS  (1h)

We encourage potential participants to attend the whole tutorial, but it is acceptable to join individual parts of it if the participant has any time constraints, e.g. due to conflicting studying activities or travel. Slides and teaching materials will be available after the tutorial.

The tutorial is a perfect opportunity to get to know what the CHERI technology is, what research areas are related to it, and how to get started experimenting with CHERI-extended hardware-software stacks. The participants are expected to be familiar with C/C++. No prior knowledge of CHERI is required, but we recommend ahead of the tutorial to read the “CHERI: Hardware-Enabled C/C++ Memory Protection at Scale” article published in the IEEE Security & Privacy magazine. The material described in there will be covered during the tutorial but getting familiar with some of the terms ahead of the tutorial will help you identify potential gaps in background knowledge and think of questions to ask.



Location:

Room FW11, 1st floor

Department of Computer Science and Technology

University of Cambridge

William Gates Building

15 JJ Thomson Avenue

Cambridge

Details on how to get here: https://www.cst.cam.ac.uk/william-gates-building-layout



Additional Information

Participants must bring their own laptop with an SSH client installed on it. For participants without access to eduroam, guest access to the Computer Lab’s WiFi will be provided.

For Parts I and II, no additional steps are required.

For Part III, participants are expected to prepare a work environment to experiment with the lowRISC’s Sonata platform. lowRISC will have a small number of laptops and Sonata boards available to borrow on the day. If you have your own Sonata board, please bring it with you to the tutorial. Regardless of having the Sonata board, please follow the steps of the Sonata software getting started guide up to the section 1.1 “Running Sonata software” ahead of the tutorial.



Travel
Car

Free parking is available at the Madingley Road Park and Ride site. This is approximately a 10 minutes’ walk from the venue.


Bus

There are two regular bus services from the city centre to the William Gates Building, and a third to the nearby Park and Ride, 10 minutes’ walk away:

  • Universal Bus (U1 and U2)
    The Universal Bus runs between Eddington and Addenbrooke’s Hospital, via West Cambridge, Cambridge city centre, and Cambridge train station. There is a bus stop outside the William Gates Building. See the route timetable.
  • Citi 4 Bus
    The Citi 4 bus operates from Cambridge city centre with a stop outside the Veterinary School on Madingley Road. For Citi bus timetable details, visit the Stagecoach website.
  • Madingley Road Park and Ride
    This P+R service runs between Madingley Road and the city centre. The bus terminates at the Madingley Road P+R Site which is approximately 10 minutes’ walk from the William Gates Building. For further route and timetable information, visit the County Council website.

Train

Cambridge train station is located one mile south-east of the City Centre, with regular services to London King’s Cross, London Liverpool Street, Peterborough, and Birmingham. The Universal Bus operates a direct link from the train station to the West Cambridge Site.


Agenda

🕑: 09:30 AM
Part I - Introduction to CHERI, memory safety and compartmentalization (1h)
🕑: 10:30 AM - 10:45 AM
Break (15 min)
🕑: 10:45 AM - 11:45 AM
Part I - CHERI software experimentation on CheriBSD/Morello (1h)
🕑: 11:45 AM - 12:45 PM
Lunch (1h)
🕑: 12:45 PM - 01:45 PM
Part II - CHERI-RISC-V, Codasip X730 and CHERI Linux (1h)
🕑: 01:45 PM - 02:00 PM
Break (15 min)
🕑: 02:00 PM - 03:00 PM
Part II - CHERI-RISC-V, Codasip X730 and CHERI Linux (1h)
🕑: 03:00 PM - 03:15 PM
Break (15 min)
🕑: 03:15 PM - 04:15 PM
Part III - CHERIoT, lowRISC’s Sonata FPGA and CHERIoT RTOS (1h)
🕑: 04:15 PM - 04:30 PM
Break (15 min)
🕑: 04:30 PM - 05:30 PM
Part III - CHERIoT, lowRISC’s Sonata FPGA and CHERIoT RTOS (1h)
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Where is it happening?

Computer Laboratory, 15 JJ Thomson Avenue, Cambridge, United Kingdom

Event Location & Nearby Stays:

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