DVClub Austin - September 23rd Expanded Event with Arm and Normal Computing
About this Event
Bhuvanesh Arulraj from Arm will be our main presentation speaker and Jan Ole Ernst from Normal Computing will be leading a Tutorial. There is no cost, this FREE event includes lunch, presentation and networking opportunities!
- 11:30am — Doors Open / Networking
- 12:00pm - 1:00pm Lunch / Main Presentation by Bhuvanesh Arulraj
- 1:00pm - 1:30pm Tutorial by Jan Ole Ernst
- 1:30pm-1:45pm Networking
Presentation - Bhuvanesh Arulraj (Arm)
"AI-Assisted Formal Verification: From Design Intent to Evidence-Backed Debug"
This presentation shares practical experience developing the AI-Assisted Formal Testbench Orchestrator (AFTO), a structured workflow for formal verification from design understanding through proof, debug, and engineering decision-making.
AFTO builds design context and a formal test plan, creates standard testbench infrastructure through deterministic automation, and uses AI to assist with design-specific properties, covers, assumptions, and auxiliary logic. The workflow then compiles and validates the generated testbench, runs formal proofs, evaluates the results, and supports evidence-driven debug using source tracing and focused waveform analysis.
Using examples across designs of different complexity, I will show where AI-assisted formal verification worked well, where it produced incomplete or incorrect conclusions, and the lessons learned from combining AI, formal tools, automation, and human engineering judgment while maintaining correctness and traceability.
Bhuvanesh Arulraj is a Verification Engineer at Arm focused on formal verification and scalable verification methodologies for complex SoC interconnect IP. His work spans design and architecture analysis, formal testbench development, reusable verification components, configuration-aware verification, and evidence-driven debug and closure. He is currently exploring structured AI-assisted verification workflows that combine automation, formal tools, and engineering judgment to improve the repeatability, scalability, and traceability of formal verification.
Tutorial - Jan Ole Ernst (Normal Computing)
"Building and Benchmarking AI Systems for Production EDA"
This tutorial will examine how Normal Computing builds and evaluates AI systems for production EDA workflows. It will cover how engineers use agents to work with design artifacts and existing EDA toolchains, as well as how those systems can be deployed on premises so sensitive design data remains within the customer’s environment.
The session will also describe our methodology for constructing realistic evaluations for tasks including debugging, functional verification, and design optimization. We will compare models and examine trade-offs between accuracy and token cost, then discuss ongoing work on post-training our own proprietary models for EDA-specific tasks.
Jan Ole Ernst is a research scientist at Normal Computing, where he works on evaluating and training models for chip design and verification, as well as supporting efforts in AI accelerator design. He has a background in physics and machine learning and holds a PhD in Physics from the University of Oxford.
Normal Computing is an applied AI company solving the hardest problems in AI and silicon. We build AI co-designed silicon on new device physics, delivering orders-of-magnitude more efficient compute for AI inference. Our AI platform designs silicon through a continually learning EDA stack, in production today with the world's largest semiconductor companies.
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