Dekimo TechTalks
Schedule
Thu Oct 24 2024 at 04:00 pm to 08:00 pm
UTC+02:00Location
Dekimo Gent | Gent, OV
About this Event
Dekimo TechTalks
On Thursday October 24th we're organizing our first Dekimo TechTalks together with Lattice. Join us for a deep dive into some technical aspects, followed by a complimentary dinner and drinks, providing the perfect opportunity to chat.
The talks will be held in Dutch.
Please note that attendance is free, but a no-show fee of €50 will be charged if you don't attend the event without nottice. You can unsubscribe via Eventbrite.
Program:
16h00: Doors open
16h30: Sander Lybeert - Dekimo: A guide through integration hell
17h00: Benjamin Thielmann- Lattice: Adding value to the FPGA designs
17h30: Jasper Devreker- Dekimo: Reversing the ESP32 Wi-Fi hardware
18h00: Start dinner.
20h00: End of event.
Sessions in depth:
1. A guide through integration hell
Sander Lybeert, Dekimo
Integrating several platforms and designs into one working machine can initially seem straightforward, but it can quickly become highly complex. Interface mismatches, unclear specifications and differing priorities can complicate matters significantly. Issues in interfaces or subsystems can escalate into chaotic situations. Decisions made in moments by one engineer can translate into months of work for others.
How can you avoid—or at least mitigate—these challenges during the design process? Sander will share his insights on designing a multi-board system developed by a diverse team of engineers (including VHDL, FW, SW, HW, layout, system engineers, and mechanical engineers). How do you ensure that if everyone performs their role correctly, the system will function smoothly in the long term (over the course of years) and support future upgrades without risk of failure?
2. Adding value to the FPGA designs
Benjamin Thielmann, Lattice
With continuous advances in semi conductor manufacturing processes, processed, the technology that has been state of the art technology not even a decade ago (such as 16nm FinFet) has become an affordable solutions for lower density FPGAs.
Due to advances in terms of performance or power consumption, but also due to availability modern FPGAs are released at this or even more advanced nodes.
Meanwhile - especially in industrial application, a moderately sized and performant FPGA (core) is required with enough I/Os (Pad Ring) to support the application at best with lowest power and highest reliability.
As a consequence with a given number of I/Os often the required space on the wafer is defined by the amount of I/Os and not the FPGA core (pad limited) and the average size of the smallest as well as the most cost-effiicent logic densities and gradually increases.
However, the FPGA, a comparably cost-intensive component is used for a reason (parallelism, throughput, realt time data handling) and cannot be removed from the design.
To avoid cost disadvantages, designers need to bring added value into the FPGA.
Beside integrating functionality one appealing way to reduce the cost of development is to make use of higher abstraction layers of Software and integrate Soft CPU cores (such as risc-V) into the FPGA to build a so called Soft-SoC-System.
Due to their increased capabilities and performance this is a great choice for many real time operating systems (RTOS) including FreeRTOS.
3. Reversing the ESP32 WiFi hardware
Jasper Devreker, Dekimo
The ESP32 is a low-cost microcontroller with Wi-Fi connectivity. Currently, the Wi-Fi MAC layer of the ESP32 is closed-source. This project aims to change that: by reverse engineering the hardware registers and software, we can build a networking stack that is open-source up to the hardware, instead of having to use the proprietary Wi-Fi binary blobs. This will improve security auditability, open up the possibility for features not supported in the proprietary implementation (for example, standards-compliant mesh networking), improve interoperability and make research into Wi-Fi networks with lots of nodes more affordable.
Where?
The TechTalks will take place in the building of Dekimo Gent, address;
Brusselsesteenweg 708
9050 Gentbrugge
Belgium
Where is it happening?
Dekimo Gent, 708 Brusselsesteenweg, Gent, BelgiumEvent Location & Nearby Stays:
EUR 0.00